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Workshop: MCHPC’20: Workshop on Memory Centric High-Performance Computing
Event TypeWorkshop
Registration Categories
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TimeWednesday, 11 November 202010am - 4:10pm EDT
LocationTrack 5
Presentations
10:00am - 10:05am EDTMCHPC’20 – Introduction: Workshop on Memory Centric High-Performance Computing
10:05am - 11:05am EDTMCHPC’20 – Keynote: The 3rd Wall and the Need for Innovation in Architectures
Presenter
11:05am - 11:30am EDTMCHPC’20 – Break
11:30am - 11:31am EDTSession I - Exploiting Heterogeneous Memory
11:31am - 12:00pm EDTPersistent Memory Object Storage and Indexing for Scientific Computing
12:00pm - 12:30pm EDTPerformance Potential of Mixed Data Management Modes for Heterogeneous Memory Systems
12:30pm - 1:00pm EDTLeveraging a Heterogenous Memory System for a Legacy Fortran Code: The Interplay of Storage Class Memory, DRAM, and OS
1:00pm - 1:30pm EDTArchitecting Heterogeneous Memory Systems with DRAM Technology Only: A Case Study on Relational Database
1:30pm - 2:30pm EDTMCHPC'20 – Break
2:30pm - 2:31pm EDTSession II - Cache Impacts and Optimizations
Presenter
2:31pm - 3:00pm EDTHostile Cache Implications for Small, Dense Linear Solves
3:00pm - 3:30pm EDTCache Oblivious Strategies to Exploit Multi-Level Memory on Manycore Systems
3:30pm - 4:00pm EDTUnderstanding the Impact of Memory Access Patterns in Intel Processors
4:00pm - 4:10pm EDTMCHPC’20 – Closing Remarks
Presenter
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