SC20 Proceedings

The International Conference for High Performance Computing, Networking, Storage, and Analysis

Benchmarking Micro-Core Architectures for Detecting Disasters at the Edge


Workshop:Urgent HPC: HPC for Urgent Decision Making

Authors: Maurice Jamieson and Nick Brown (Edinburgh Parallel Computing Centre (EPCC), University of Edinburgh)


Abstract: Leveraging real-time data to detect disasters such as wildfires, extreme weather, earthquakes, tsunamis, human health emergencies or global diseases is an important opportunity. Much of this data, however, is generated in the field and the volumes involved mean that it is impractical for transmission back to a central data-center for processing. Instead, edge devices are required to generate insights from sensor data streaming in, but an important question, given the severe performance and power constraints under which these must operate, is that of the most suitable CPU architecture. One class of device that we believe has a significant role to play is that of micro-cores, which combine many simple low-power cores in a single chip. There are many from which to choose, however, and an important question is which device is most suited to which situation.

This paper presents the Eithne framework, designed to simplify benchmarking of micro-core architectures. Three benchmarks, LINPACK, DFT and FFT, have been implemented atop this framework. We use these to explore the key characteristics and concerns of common micro-core designs within the context of operating on the edge for disaster detection. The result of this work is an extensible framework that the community can use to help develop and test these devices in the future.





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