SC20 Is Everywhere We Are

SC20 Virtual Platform
Biography
Rafael Asenjo is Professor of Computer Architecture at the University of Malaga. He obtained a PhD in Telecommunication Engineering in 1997. He has been using TBB since 2008 and over the last five years, he has focused on productively exploiting heterogeneous chips leveraging TBB as the orchestrating framework. In 2013 and 2014 he visited UIUC to work on CPU+GPU chips. In 2015 and 2016 he also started to research into CPU+FPGA chips while visiting the University of Bristol. He served as General Chair for ACM PPoPP'16 and as an Organization Committee member as well as a Program Committee member for several HPC related conferences (PPoPP, SC, PACT, IPDPS, HPCA, EuroPar, and SBAC- PAD). His research interests include heterogeneous programming models and architectures, parallelization of irregular codes and energy consumption. Along with Michael Voss and James Reinders he co-authored the latest book (open access) on Threading Building Blocks (Pro TBB).
Presentations
Tutorial
Accelerators, FPGA, and GPUs
Heterogeneous Systems
Parallel Programming Languages, Libraries, and Models
Portability
TUT
Tutorial
Accelerators, FPGA, and GPUs
Heterogeneous Systems
Parallel Programming Languages, Libraries, and Models
Portability
TUT
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