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SC20 Virtual Platform
Vikram A. Saletore
Biography
I am a Principal Engineer, a Deep Learning performance architect in Machine Learning Performance in Intel Architecture, Graphics, and Software at Intel Corporation. My focus is on performance optimizations of Parallel and Distributed Machine Learning (ML) and Deep Learning (DL) workloads at Intel. I also collaborate with industry partners and customers on Hadoop/Spark optimizations for ETL, Machine Learning, Deep Learning, and Graph Analytics. I have secured Xeon and Xeon Phi design wins. I am also technical Co-Principal Investigator for large scale distributed DL joint research with a European member of Intel® Parallel Computing Centers (IPCC).

I have 25+ years of experience with strengths in software and platform/CPU architecture skills, breadth & depth and excellent communication skills, and have led data center initiatives; workload performance characterization and modeling, energy efficient platforms, and parallel database SW optimizations for ISVs (Oracle, Informix). I have contributed to technology readiness via path-finding for Intel’s 3DXPoint and as a Research Scientist with Intel Labs managed teams and led research collaboration with HP Labs on TCP network acceleration.

Prior to Intel, I was a tenure-track faculty in Computer Science at OSU, Corvallis, OR and led NSF & industry funded research in parallel programming and distributed computing supervising 8 graduate students (PhD, MS). Prior industry (DEC and AMD) experience includes chip designs and simulators for digital filters, networking and Massively Parallel Processing (MPP) systems. I have has also served on several conference Program Committees, chaired workshops and participated in HPC-AI Convergence and Big Data panel discussions.

I received my PhD in EE in the area of Parallel Programming & Distributed Computing from the University of Illinois at Urbana-Champaign and MS from Berkeley. I hold 5 patents and have ~60 research publications and articles.
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