Vijayalakshmi Saravanan received her Ph.D. in Computer Science and Engineering from VIT University, India under Erasmus Mundus Fellowship (EURECA) as a research exchange student at Mälardalen University, Sweden and currently a visiting researcher at Ryerson University, Canada. She was an Assistant Professor in Practice at the University of Texas, San Antonio (UTSA) in the Department of Computer Science. Prior to this, she was a Postdoctoral Associate at UB (University at Buffalo), The State University of New York, USA and University of Waterloo, Canada under the prestigious “Schlumberger Faculty for the Future” Fellowship award (2015-2017). She is having 10 years of teaching experience in two premier Universities VIT and Amrita Vishwa Vidyapeetham, India. Dr. Saravanan has published many technical articles in scholarly international journal and conferences. She is serving as a technical reviewer and program committee member for reputed conference & journals such as GHC, SIGCSE, and Springer. Her research interests include Power-Aware Processor Design, Big Data, IoT and Computer Architecture. She is a Senior Member of IEEE & ACM, CSI, Ex-Chair for IEEE-WIE VIT affinity group, India (2009-2015), NPA (National Postdoctoral Association) Annual Meetings committee, Workshop/IIA Co-Chair (2017-2019) and a Board member of N2WOMEN (Networking Networking Women).
Education, Training and Outreach
HPC Training and Education