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Fabrice Rastello is the leader of the CORSE (Compiler Optimization and Runtime SystEms) Inria team. His expertize is both on automatic parallelization (PhD thesis on tiling as a loop transformation), and compiler back-end optimization (engineer at STMicroelectronics’s compiler group + researcher in Compsys Inria team). Among others, he advised three PhD thesis so as to fully revisit register allocation for JIT compilation in the light of Static Single Assignment (SSA) properties. He is the main editor of the “SSA based compiler design” book to be published by Springer. He likes mixing theory (mostly graphs, algorithmic, and algebra) and practice (industrial transfer). His current research topics are mostly focused on combining run-time techniques with static compilation. Hybrid compilation being an example of such approach he is trying to promote.
Graph Algorithms
Linear Algebra
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