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Accelerating High-Order Stencils on GPUs
Event Type
Workshop
Registration Categories
W
TimeThursday, 12 November 20203:30pm - 4pm EST
LocationTrack 2
DescriptionWhile implementation strategies for low-order stencils on GPUs have been well-studied in the literature, not all of the techniques studied work well for high-order stencils, such as those used for seismic imaging. In this paper, we study practical seismic imaging computations on GPUs using high-order stencils on large domains with meaningful boundary conditions. We manually crafted a collection of implementations of a 25-point seismic modeling stencil in CUDA along with code to apply the boundary conditions. We evaluate our stencil code shapes, memory hierarchy usage, data-fetching patterns, and other performance attributes. We conducted an empirical evaluation of these stencils using several mature and emerging tools and discuss our quantitative findings. Some of our implementations achieved twice the performance of a proprietary code developed in C and mapped to GPUs using OpenACC. Additionally, several of our implementations have excellent performance portability.
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