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Cache Oblivious Strategies to Exploit Multi-Level Memory on Manycore Systems
Event Type
Workshop
Registration Categories
W
TimeWednesday, 11 November 20203pm - 3:30pm EST
LocationTrack 5
DescriptionMany-core systems are beginning to feature novel large, high-bandwidth intermediate memory as a visible part of the memory hierarchy. This paper discusses how to make use of intermediate memory when composing multiple matrix operations.

We re-purpose the cache-oblivious approach developed by Frigo and apply it to the composition of a notionally bandwidth-bound kernel (transpose) with a compute-bound kernel (matrix multiply). Particular focus is on regions of matrix shapes far from square that are not usually considered. The resulting example is far simpler than optimized codes, but reasonably close in performance. Also, perhaps of more importance is developing a paradigm for how to construct other codes using intermediate memories.
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