FPGA Acceleration of Fluid-Flow Kernels
SessionH2RC 2020: Sixth International Workshop on Heterogeneous High-Performance Reconfigurable Computing
Event Type
Workshop
Accelerators, FPGA, and GPUs
Architectures
Emerging Technologies
Heterogeneous Systems
Reconfigurable Computing
W
TimeFriday, 13 November 20202:45pm - 3:15pm EDT
LocationTrack 6
DescriptionAdding heterogeneity to high-performance systems has the potential to meet the increasing performance demands of applications beyond the era of Moore's Law speedup. In this paper we design and evaluate an FPGA pipeline to accelerate the CMT-bone-BE physics application, which is highly scalable, but performance bound by compute-heavy fluid-flow kernels. For the targeted kernels, a single instance of our FPGA pipeline shows a speedup of up to 9.4x over a CPU core. For the entire application workload, this kernel acceleration provides an average 1.5x speedup over a CPU core, while also outperforming a GPU. With even mid-range FPGAs providing enough resources to replicate our pipeline over 8 times, we project that the FPGA accelerator can add and/or replace 12 equivalent cores with a low-power alternative, with additional time-sharing optimizations potentially increasing that amount significantly.