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SC20 Virtual Platform
archspec: A Library for Detecting, Labeling, and Reasoning About Microarchitectures
Event Type
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TimeThursday, 12 November 20203:30pm - 3:55pm EDT
LocationTrack 9
DescriptionOptimizing scientific code for specific microarchitectures is critical for performance, as each new processor generation supports new, specialized vector instructions. There is a lack of support for this in package managers and container ecosystems, however, and users often settle for generic, less optimized binaries because they run on a wide range of systems and are easy to install. This comes at a considerable cost in performance. In this paper we introduce archspec, a library for reasoning about processor microarchitectures. We present the design and capabilities of archspec, which include detecting and labelling of microarchitectures, reasoning about microarchitectures and comparing them for compatibility and determining the compiler flags that should be used to compile software for a specific microarchitecture. We demonstrate the benefits that archspec brings by discussing several use cases including package management, optimized software stacks and multi-architecture container orchestration.
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