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DTSTAMP:20210402T160546Z
LOCATION:Track 4
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UID:submissions.supercomputing.org_SC20_sess239_tut130@linklings.com
SUMMARY:Node-Level Performance Engineering: Part 1
DESCRIPTION:Tutorial\n\nNode-Level Performance Engineering: Part 1\n\nHage
 r, Eitzinger, Wellein\n\nThe gap between peak and application performance 
 is continuing to open. Paradoxically, bad node-level performance entails s
 calable code, but at the price of increased time-to-solution. Therefore, v
 aluable resources are wasted on massive scales. If we care about resource 
 efficiency on any scale, optimal node-level performance is crucial. We con
 vey the architectural features of current processor chips, multiprocessor 
 nodes and accelerators, as far as they are relevant for the practitioner. 
 Peculiarities like SIMD, shared caches, bandwidth bottlenecks and ccNUMA a
 re introduced, and the influence of system topology and affinity on the pe
 rformance of parallel programming constructs is demonstrated. Performance 
 engineering and performance patterns are suggested as powerful tools that 
 help the user understand the bottlenecks at hand and to assess the impact 
 of possible code optimizations. A cornerstone of these concepts is the roo
 fline model, which is described in detail, including useful case studies a
 nd limits of its applicability.\n\nTag: Requirements, Performance, and Ben
 chmarks, Performance/Productivity Measurement and Evaluation, Software Eng
 ineering\n\nRegistration Category: Tutorial Reg Pass
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