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LOCATION:Track 5
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UID:submissions.supercomputing.org_SC20_sess195@linklings.com
SUMMARY:MCHPC’20: Workshop on Memory Centric High-Performance Computing
DESCRIPTION:Workshop\n\nMCHPC’20 – Introduction: Workshop on Memory Centri
 c High-Performance Computing\n\nYan, Brightwell, Gokhale, Sun\n\nThe growi
 ng disparity between CPU speed and memory speed, known as the memory wall 
 problem, has been one of the most critical and long-standing challenges in
  the computing industry. The situation is further complicated by the recen
 t expansion of the memory hierarchy, which is becoming deeper and mor...\n
 \n---------------------\nMCHPC'20 – Break\n\n\n\n---------------------\nSe
 ssion I - Exploiting Heterogeneous Memory\n\nBrightwell\n\n---------------
 ------\nCache Oblivious Strategies to Exploit Multi-Level Memory on Manyco
 re Systems\n\nButcher, Olivier, Kogge\n\nMany-core systems are beginning t
 o feature novel large, high-bandwidth intermediate memory as a visible par
 t of the memory hierarchy. This paper discusses how to make use of interme
 diate memory when composing multiple matrix operations. \n\nWe re-purpose 
 the cache-oblivious approach developed by Frigo...\n\n--------------------
 -\nMCHPC’20 – Break\n\n\n\n---------------------\nMCHPC’20 – Closing Remar
 ks\n\nYan\n\n---------------------\nMCHPC’20 – Keynote: The 3rd Wall and t
 he Need for Innovation in Architectures\n\nKogge\n\nIn the past we have se
 en two major "walls" (memory and power) whose vanquishing required signifi
 cant advances in architecture. This talk will discuss evidence on the emer
 gence of a new third wall dealing with data locality, which is prevalent i
 n data intensive applications where computation is domin...\n\n-----------
 ----------\nPerformance Potential of Mixed Data Management Modes for Heter
 ogeneous Memory Systems\n\nEffler, Jantz, Jones\n\nMany high-performance s
 ystems now include different types of memory devices within the same compu
 te platform to meet strict performance and cost constraints. Such heteroge
 neous memory systems often include an upper-level tier with better perform
 ance, but limited capacity, and lower-level tiers with ...\n\n------------
 ---------\nLeveraging a Heterogenous Memory System for a Legacy Fortran Co
 de: The Interplay of Storage Class Memory, DRAM, and OS\n\nChristgau, Stei
 nke\n\nLarge capacity Storage Class Memory (SCM) opens new possibilities f
 or workloads requiring a large memory footprint. We examine optimization s
 trategies for a legacy Fortran application on systems with an heterogeneou
 s memory configuration comprising SCM and DRAM. We present a performance s
 tudy for th...\n\n---------------------\nUnderstanding the Impact of Memor
 y Access Patterns in Intel Processors\n\nMonil, Lee, Vetter, Malony\n\nDue
  to increasing complexity in the memory hierarchy, predicting the performa
 nce of a given application in a given processor is becoming more difficult
 . The problem is worsened by the fact that the hardware needed to deal wit
 h more complex memory traffic also affects energy consumption.  Moreover, 
 i...\n\n---------------------\nPersistent Memory Object Storage and Indexi
 ng for Scientific Computing\n\nKhan, Sim, Vazhkudai, Ma, Oh...\n\nThis pap
 er presents MOSIQS, a persistent memory object storage framework with meta
 data indexing and querying for scientific computing. We design MOSIQS base
 d on the key idea that memory objects on shared PM pool can live beyond th
 e application lifetime and can become the sharing currency for applica...\
 n\n---------------------\nHostile Cache Implications for Small, Dense Line
 ar Solves\n\nDeakin, Cownie, McIntosh-Smith, Lovegrove, Smedley-Stevenson\
 n\nThe full assembly of the stiffness matrix in finite element codes can b
 e prohibitive in terms of memory footprint resulting from storing that eno
 rmous matrix. An optimisation and work around, particularly effective for 
 discontinuous Galerkin based approaches, is to construct and solve the sma
 ll dens...\n\n---------------------\nSession II - Cache Impacts and Optimi
 zations\n\nHale\n\n---------------------\nArchitecting Heterogeneous Memor
 y Systems with DRAM Technology Only: A Case Study on Relational Database\n
 \nQiao, Chen, Hao, Zhang, Xie...\n\nThis paper advocates a DRAM-only desig
 n strategy to reduce the computing system memory cost and demonstrates its
  potential in the context of relational database. In particular, we envisi
 on a low-cost heterogeneous DRAM fabric consisting of convenient but expen
 sive byte-addressable DRAM and large-cap...\n\n\nRegistration Category: Wo
 rkshop Reg Pass
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