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BEGIN:VEVENT
DTSTAMP:20210402T160558Z
LOCATION:Track 6
DTSTART;TZID=America/New_York:20201118T130000
DTEND;TZID=America/New_York:20201118T143000
UID:submissions.supercomputing.org_SC20_sess185@linklings.com
SUMMARY:Compute Express Link™ (CXL™) and Gen-Z Protocols: Bridging the Res
 ource Gap Between CPU, Memory and Accelerators
DESCRIPTION:Panel\n\nCompute Express Link™ (CXL™) and Gen-Z Protocols: Bri
 dging the Resource Gap Between CPU, Memory and Accelerators\n\nCoughlin, B
 owman, Symons, Das Sharma, Ward\n\nCompute Express Link™ (CXL™) and Gen-Z 
 are low-latency, memory-semantic (read/write) protocols that enable the tr
 ansition to memory-centric architectures. CXL provides coherent, point-to-
 point solutions with emphasis on node-level computing, while the core desi
 gn of Gen-Z is fabric-based and focuses...\n\n\nTag: Architectures, Collab
 orative Environments, Data Analytics, Compression, and Management, Network
 s\n\nRegistration Category: Tech Program Reg Pass
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