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DTSTAMP:20210402T160558Z
LOCATION:Track 6
DTSTART;TZID=America/New_York:20201118T130000
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UID:submissions.supercomputing.org_SC20_sess185_pan117@linklings.com
SUMMARY:Compute Express Link™ (CXL™) and Gen-Z Protocols: Bridging the Res
 ource Gap Between CPU, Memory and Accelerators
DESCRIPTION:Panel\n\nCompute Express Link™ (CXL™) and Gen-Z Protocols: Bri
 dging the Resource Gap Between CPU, Memory and Accelerators\n\nCoughlin, B
 owman, Symons, Das Sharma, Ward\n\nCompute Express Link™ (CXL™) and Gen-Z 
 are low-latency, memory-semantic (read/write) protocols that enable the tr
 ansition to memory-centric architectures. CXL provides coherent, point-to-
 point solutions with emphasis on node-level computing, while the core desi
 gn of Gen-Z is fabric-based and focuses on connectivity at the rack and ro
 w level.\n\nThe CXL Consortium™ and Gen-Z Consortium™ recently announced a
  Memorandum of Understanding (MoU) agreement to leverage the complementary
  aspects of both technologies. The agreement outlines the formation of com
 mon workgroups to define bridging between the two protocols. \n\nIn this p
 anel, attendees will learn how HPC applications and solutions are optimize
 d by these emerging technologies, as well as examine why, where and how to
  deploy them architecturally.\n\nTag: Architectures, Collaborative Environ
 ments, Data Analytics, Compression, and Management, Networks\n\nRegistrati
 on Category: Tech Program Reg Pass
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