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DTSTAMP:20210402T160547Z
LOCATION:Track 4
DTSTART;TZID=America/New_York:20201118T130000
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UID:submissions.supercomputing.org_SC20_sess154@linklings.com
SUMMARY:Porting Applications to Specific Hardware
DESCRIPTION:Paper\n\nFast Stencil-Code Computation on a Wafer-Scale Proces
 sor\n\nRocki, Van Essendelft, Sharapov, Schreiber, Morrison...\n\nThe perf
 ormance of CPU-based and GPU-based systems is often low for PDE codes, whe
 re large, sparse and often structured systems of linear equations must be 
 solved. Iterative solvers are limited by data movement, both between cache
 s and memory and among nodes. Here we describe the solution of such sy...\
 n\n---------------------\nMassive Parallelization for Finding Shortest Lat
 tice Vectors Based on Ubiquity Generator Framework\n\nTateiwa, Shinano, Na
 kamura, Yoshida, Kaji...\n\nLattice-based cryptography has received attent
 ion as a next-generation encryption technique, because it is believed to b
 e secure against attacks by classical and quantum computers. Its essential
  security depends on the hardness of solving the shortest vector problem (
 SVP). In cryptography, to determ...\n\n---------------------\nFBLAS: Strea
 ming Linear Algebra on FPGA\n\nDe Matteis, de Fine Licht, Hoefler\n\nSpati
 al computing architectures pose an attractive alternative to mitigate cont
 rol and data movement overheads typical of load-store architectures. In pr
 actice, these devices are rarely considered in the HPC community due to th
 e steep learning curve, low productivity and lack of available libraries .
 ..\n\n\nTag: Accelerators, FPGA, and GPUs, Applications, Architectures\n\n
 Registration Category: Tech Program Reg Pass
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